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VOXL 2 Connectors

m0054-connectors

Table of contents

  1. Video Overview of Connectors
  2. Connector Callouts
    1. Add-on Board to Board Design Package
  3. Buttons
    1. SW1 - Force Fastboot Button
    2. SW2 - EDL Switch
  4. Pinouts
    1. J2 - 5VDC Fan Control
    2. J3 - Legacy Board to Board Connector (B2B)
      1. J3 Pin-out
    3. J4 - Power Connector / I2C Battery Monitoring
    4. J5 - High Speed Board to Board Connector (HSB2B)
      1. J5 Pin-out
    5. Camera Group J6, J7, and J8 Pin-outs
      1. General Pin-out
      2. J6 - Camera Group 0 Specific Pinout
        1. J6 Pin-out
      3. J7 - Camera Group 1 Specific Pinout
        1. J7 Pin-out
      4. J8 - Camera Group 2 Specific Pinout
        1. J8 Pin-out
    6. J10 - External SPI
      1. Overview
      2. J10 Pin-out
    7. J18 UART (ESC)
      1. J18 ESC UART
      2. SW Summary
    8. J19 - External Sensors (2x UART/ 2x I2C)
      1. J19 Pin-out
      2. SW Summary
    9. Power Input/Output Important Note:

Video Overview of Connectors

Connector Callouts

m0054-connectors


All single ended signals on B2B connectors J3, J5, J6, J7, and J8 are 1.8V CMOS unless explicitly noted. All single ended signals on cable-to-board connectors J10, J18, & J19 are 3.3V CMOS unless explicitly noted.

ConnectorDescriptionMPN (Board Side)Mating MPN (Board/Cable Side)TypeSignal Feature Summary
J2FanSM02B-SRSS-TB(LF)(SN)SHR-02V-SCable Header, 2-pin R/A5V DC for FAN + PWM Controlled FAN-Return (GND)
J3Legacy B2BQSH-030-01-L-D-K-TRQTH-030-01-L-D-A-K-TRB2B Receptacle, 60-pin5V/3.8V/3.3V/1.8V power for plug-in boards, JTAG and Debug Signals, QUP expansion, GPIOs, USB3.1 Gen 2 (USB1)
J4Prime Power In220570450050375043Cable Connector, 4-pin R/A+5V main DC power in + GND, I2C@5V for power monitors
J5High Speed B2BADF6-30-03.5-L-4-2-A-TRADM6-30-01.5-L-4-2-A-TRB2B Socket, 120-pinMore 3.8V/3.3V/1.8V power for plug-in boards, 5V power in for “SOM Mode”, QUP expansion, GPIOS (including I2S), SDCC (SD Card V3.0), UFS1 (secondary UFS Flash), 2L PCIe Gen 3, AMUX and SPMI PMIC signals
J6Camera Group 0DF40C-60DP-0.4V(51)DF40C-60DS-0.4VB2B Plug, 60-pinQty-2 4L MIPI CSI ports, CCI and camera control signals, 8 power rails (from 1.05V up to 5V) for cameras and other sensors, dedicated SPI (QUP) port
J7Camera Group 1DF40C-60DP-0.4V(51)DF40C-60DS-0.4VB2B Plug, 60-pinQty-2 4L MIPI CSI ports, CCI and camera control signals, 8 power rails (from 1.05V up to 5V) for cameras and other sensors, dedicated SPI (QUP) port
J8Camera Group 2DF40C-60DP-0.4V(51)DF40C-60DS-0.4VB2B Plug, 60-pinQty-2 4L MIPI CSI ports, CCI and camera control signals, 8 power rails (from 1.05V up to 5V) for cameras and other sensors, dedicated SPI (QUP) port
J9USB-C (ADB)UJ31-CH-3-SMT-TRUSB Type-CCable Receptacle, 24-pin R/AADB USB-C with re-driver and display port alternate mode (USB0)
J10SPI ExpansionSM08B-GHS-TB(LF)(SN)GHR-08V-SCable Header, 8-pin R/ASPI@3.3V with 2 CS_N pins, 32kHz CLK_OUT@3.3V
J18ESC (SLPI Access)SM04B-GHS-TB(LF)(SN)GHR-04V-SCable Header, 4-pin R/AESC UART@3.3V, 3.3V reference voltage
J19GNSS/MAG/RC/I2C (SLPI Access)SM12B-GHS-TB(LF)(SN)GHR-12V-SCable Header, 6-pin R/AGNSS UART@3.3V, Magnetometer I2C@3.3V, 5V, RC UART, Spare I2C

Add-on Board to Board Design Package

Reference add-on board Altium schematic package can be downloaded here

Buttons

SW1 - Force Fastboot Button

Force Fastboot momentary button.

To force device into fastboot mode:

  • power off device, remove USB cable to completely power down
  • press and hold SW1 button down
  • power on device, attach USB cable
  • release SW1 button
  • from host computer, run fastboot devices and verify the device shows up. If not, restart this procedure

To reboot device to fastboot:

  • device is powered on
  • press and hold SW1 for 30 seconds until the device reboots into fastboot mode

SW2 - EDL Switch

Emergency Download switch, used for factory flashing. Should be left OFF. See user guide for QDL if interested in more information.


Pinouts


J2 - 5VDC Fan Control

Pin #Signal NameNotes
1VDC_5V_LOCAL5V protected power output *
2FAN RETURN (GND)Return limited to ~400mA

J3 - Legacy Board to Board Connector (B2B)

Currently Supported Legacy Add-Ons:

  • M0017 USB Debug Add-On
  • M0030 LTE Modem Add-On
  • M0048 Microhard Modem Add-On

The Legacy Board to Board connector is designed to host VOXL Add-ons such as the LTE Add-on v2 and the Microhard Add-on.

ConnectorMPN
Board ConnectorQSH-030-01-L-D-K-TR
Mating ConnectorQTH-030-01-L-D-A-K-TR

J3 Pin-out

Odd Pin #Signal/VoltageEven Pin #Signal/Voltage
1DGND2VDC_5V_LOCAL
3GPIO_23_UART7_RXD, /dev/ttyHS14VDC_5V_LOCAL
5GPIO_22_UART7_TXD, /dev/ttyHS16VDC_5V_LOCAL
7GPIO_52_SPI17_MISO8USB1_HS_ID_LEGACY (Normally N.C.)
9GPIO_53_SPI17_MOSI10DGND
11DGND12USB1_HS_DM
13GPIO_126_I2C9_SCL14USB1_HS_DP
15GPIO_125_I2C9_SDA16VDC_5V_LOCAL_USB1
17GPIO_55_SPI17_CS18DGND
19GPIO_54_SPI17_SCLK20USB1_SS_TX_M
21DGND22USB1_SS_TX_P
23GPIO_130_I2C10_SCL, /dev/i2c-124GPIO_20
25GPIO_129_I2C10_SDA, /dev/i2c-126GPIO_21
27GPIO_35_DBG_UART12_RX28GPIO_32_QUP12_L0
29GPIO_34_DBG_UART12_TX30GPIO_33_QUP12_L1
31DGND32USB1_SS_RX_M
33JTAG_SRST_N34USB1_SS_RX_P
35JTAG_TCK36DGND
37JTAG_TDI38GPIO_131_USB_HUB_RESET
39JTAG_TDO40GPIO_124
41JTAG_TMS42GPIO_145
43JTAG_TRST_N44DGND
45JTAG_PS_HOLD46GPIO_90_FAST_BOOT_3
47VREG_S4A_1P848GPIO_76_FAST_BOOT_2
49PM_RESIN_N50GPIO_47_SPI14_CS2_FAST_BOOT_1
51SDM_RESOUT_N52GPIO_27_FAST_BOOT_0
53VREG_3P3V_LOCAL54GPIO_128_WDOG_DIS
55KPD_PWR_N56SDM_FORCE_USB_BOOT
57VPH_PWR58DGND
59DGND60CLK_PMK_PMIC

J4 - Power Connector / I2C Battery Monitoring

Note: for use with VOXL Power Module v3

Pin#SignalNotes/Usage
1VDCIN_5VDC from Power Module, “unprotected”
2GNDPower Module Return
3I2C_CLKSSC_QUP_1, 5V signal levels, Pullups on Power Module
4I2C_SDASSC_QUP_1, 5V signal levels, Pullups on Power Module

J5 - High Speed Board to Board Connector (HSB2B)

Currently Supported Add-Ons:

  • M0062 - Debug/PCIe Add-On
  • M0067 - 5G Add-On
  • M0090 - 5G Add-On
ConnectorMPN
Board ConnectorADF6-30-03.5-L-4-2-A-TR
Mating ConnectorADM6-30-01.5-L-4-2-A-TR

J5 Pin-out

PinSignal/VoltagePinSignal/VoltagePinSignal/VoltagePinSignal/Voltage
A1 (1)VDCIN_5VB1 (31)VDCIN_5VC1 (61)VDCIN_5VD1 (91)VDCIN_5V
A2VDCIN_5VB2VDCIN_5VC2VDCIN_5VD2VDCIN_5V
A3GNDB3GNDC3GNDD3GND
A4GNDB4GNDC4GNDD4GND
A5VREG_3P3V_LOCALB5GNDC5GPIO_119_SPI3_MISOD5GPIO_36_UART13_CTS
A6VREG_3P3V_LOCALB6GNDC6GPIO_120_SPI3_MOSID6GPIO_37_UART13_RTS
A7GNDB7GPIO_16_QUP6_L0C7GPIO_121_SPI3_SCLKD7GPIO_38_UART13_TXD
A8GPIO_115_I2C2_SDAB8GPIO_17_QUP6_L1C8GPIO_122_SPI3_CSD8GPIO_39_UART13_RXD
A9GPIO_116_I2C2_SCLB9GPIO_18_QUP6_L2C9GPIO_24_I2C8_SDAD9GPIO_8_I2C4_SDA
A10GPIO_117_QUP2_L2B10GPIO_19_QUP6_L3C10GPIO_25_I2C8_SCLD10GPIO_9_I2C4_SCL
A11GPIO_118_QUP2_L3B11GPIO_155C11GNDD11PM8250_AMUX1
A12SD_UFS_CARD_DET_NB12GPIO_154C12GPIO_145 (intentional duplicate to Legacy B2B pin 42)D12GND
A13GNDB13GPIO_153C13GPIO_144D13PCIE2_REFCLK_M
A14SDC2_CLKB14GPIO_152C14GPIO_143D14PCIE2_REFCLK_P
A15GNDB15GNDC15GPIO_142D15GND
A16VREG_L9C_2P96B16GPIO_0_QUP19_L0C16GPIO_137D16PCIE2_RX0_M
A17SDC2_CMDB17GPIO_1_QUP19_L1C17GNDD17PCIE2_RX0_P
A18SDC2_DATA_0B18GPIO_2_QUP19_L2, /dev/ttyHS2C18GPIO_88D18GND
A19SDC2_DATA_1B19GPIO_3_QUP19_L3, /dev/ttyHS2C19GPIO_89D19PCIE2_RX1_M
A20SDC2_DATA_2B20GPIO_56_I2C18_SDAC20GPIO_87_PCIE2_WAKE_ND20PCIE2_RX1_P
A21SDC2_DATA_3B21GPIO_57_I2C18_SCLC21GPIO_86D21GND
A22GNDB22GNDC22GPIO_85D22PCIE2_TX0_M
A23UFS1_REFCLKB23GPIO_60_QUP11_L0C23GNDD23PCIE2_TX0_P
A24GNDB24GPIO_61_QUP11_L1C24PMIC_8150L_AMUX1D24GND
A25UFS1_TX0_MB25GPIO_62_QUP11_L2C25GNDD25PCIE2_TX1_M
A26UFS1_TX0_PB26GPIO_63_QUP11_L3C26GNDD26PCIE2_TX1_P
A27GNDB27GNDC27GNDD27GND
A28UFS1_RX0_MB28SPMI_CLKC28VPH_PWR_3P8VD28GND
A29UFS1_RX0_PB29SPMI_DATAC29VPH_PWR_3P8VD29VREG_S4A_1P8
A30 (30)GNDB30 (60)GNDC30 (90)VPH_PWR_3P8VD30 (120)VREG_S4A_1P8

Camera Group J6, J7, and J8 Pin-outs

General Pin-out

Generic camera group pinout, please work with ModalAI for any mating designs to gauranteee proper operation

Pin#Signal
1GND
2GND
3Lower CCI_I2C_SDA
4DVDD 1.2V
5Lower CCI_I2C_SCL
6DOVDD 1.8V
7GND
8DVDD 1.05V
9Lower CSI_CLK_P
10Lower RST_N
11Lower CSI_CLK_M
12Lower MCLK
13Lower CSI_DAT0_P
14GND
15Lower CSI_DAT0_M
16Lower CCI Timer
17GND
18Upper CCI Timer
19Lower CSI_DATA1_P
20Upper MCLK
21Lower CSI_DATA1_M
22AVDD 2.8V
23Lower CSI_DATA2_P
24GND
25Lower CSI_DATA2_M
26Upper RST_N, Shared
27GND
28Upper CCI_I2C_SDA
29Lower CSI_DATA3_P
30Upper CCI_I2C_SCL
31Lower CSI_DATA3_M
32Spare MCLK/GPIO
33GND
34Group SPI MISO (groups 0/1)
35Upper CSI_CLK_P
36Group SPI MOSI (groups 0/1)
37Upper CSI_CLK_M
38Group SPI SCLK (groups 0/1)
39Upper CSI_DATA0_P
40Group SPI CS_N (groups 0/1)
41Upper CSI_DATA0_M
42VREG_S4A_1P8
43GND
44GND
45Upper CSI_DATA1_P
46VPH_PWR 3.8V
47Upper CSI_DATA1_M
48VPH_PWR 3.8V
49Upper CSI_DATA2_P
50GND
51Upper CSI_DATA2_M
523.3V
53GND
54GND
55Upper CSI_DATA3_P
565V
57Upper CSI_DATA3_M
585V
59GND
60GND

J6 - Camera Group 0 Specific Pinout

Configured for the following hardware:

                                                 +--> M0010
- M0054 J6 <--> M0076-1 interposer <--> M0010 <--|
                                                 +--> M0010

More camera information here More regulator information here

Connector: DF40C-60DP-0.4V(51)

Device Tree:

  • qcom,cam-sensor0
  • qcom,cam-sensor1
J6 Pin-out
Pin #Signal NameUsage / Notes
1GND 
2GND 
3CCI_I2C0_SDACAM0_CCI0_SDA, gpio101
4VREG_PM8009_L2_1P2DVDD 1.2V
5CCI_I2C0_SCLCAM0_CCI0_SCL, gpio102
6VREG_PM8009_L7_1P8CAM0_VIO_1P8, CAM0_VIO_1P8
7GND 
8VREG_PM8009_L1_1P05CAM0_VDD_1P05, NOTE: current this is ~1.13VDC
9CSI0_CLK_CON_P 
10GPIO_93_CAM0_RST_NCAM0_RST_N, gpio93
11CSI0_CLK_CON_N 
12GPIO_94_CAM_MCLK0_CONCAM_MCLK0_CON, gpio94
13CSI0_LANE0_CON_PLEFT
14GND 
15CSI0_LANE0_CON_NLEFT
16GPIO_110_CCI_TIMER1(unused in version 0)
17GND 
18GPIO_113_CCI_TIMER4CAM_FSYNC_1_OUT, CAM_FSYNC0_IN
19CSI0_LANE1_CON_PRIGHT
20CAM_MCLK1_CONCAM_MCLK1_CON, gpio95
21CSI0_LANE1_CON_NRIGHT
22VREG_PM8009_L5_2P8CAM0_AVDD_2P8, CAM1_AVDD_2P8
23CSI0_LANE2_CON_P 
24GND 
25CSI0_LANE2_CON_N 
26GPIO_109_CAM3_RST_N(shared, CAM3_RST_N)
27GND 
28CCI_I2C1_SDACAM1_CCI1_SDA, CAM4_CCI1_SDA
29CSI0_LANE3_CON_P 
30CCI_I2C1_SCLCAM1_CCI1_SCL, CAM4_CCI1_SCL
Pin #Signal NameNotes
31CSI0_LANE3_CON_N 
32MCLK6_G0_CON(shared) CAM1_RST_N, gpio100,
33GND 
34GPIO_28_CAM0_SPI0_MISO/dev/spidev0.0
35CSI1_CLK_CON_P 
36GPIO_29_CAM0_SPI0_MOSI/dev/spidev0.0
37CSI1_CLK_CON_N 
38GPIO_30_CAM0_SPI0_CLK/dev/spidev0.0
39CSI1_LANE0_CON_P 
40GPIO_31_CAM0_SPI0_CS/dev/spidev0.0
41CSI1_LANE0_CON_N 
42VREG_S4A_1P8 
43GND 
44GND 
45CSI1_LANE1_CON_P 
46VPH_PWR 
47CSI1_LANE1_CON_N 
48VPH_PWR 
49CSI1_LANE2_CON_P 
50GND 
51CSI1_LANE2_CON_N 
52VREG_3P3V_LOCAL 
53GND 
54GND 
55CSI1_LANE3_CON_P 
56VDC_5V_LOCAL 
57CSI1_LANE3_CON_N 
58VDC_5V_LOCAL 
59GND 
60GND 

J7 - Camera Group 1 Specific Pinout

Configured for the following hardware:

                                +--> M0014   (M0084-JL - lower)
- M0054 J7 <--> M0084 flex <----|
                                +--> M0025-2 (M0084-JU - upper)

Connector: DF40C-60DP-0.4V(51)

Device Tree:

  • qcom,cam-sensor2
  • qcom,cam-sensor3
J7 Pin-out
Pin #Signal NameUsage / Notes
1GND 
2GND 
3CCI_I2C2_SDACAM2_CCI1_SDA, gpio105
4VREG_PM8009_L2_1P2(M0084, R1 not stuffed, not routed)
5CCI_I2C2_SCLCAM2_CCI1_SCL, gpio106
6VREG_PM8009_L7_1P8CAM2_DOVDD_1P8, CAM3_DOVDD_1P8
7GND 
8VREG_PM8009_L1_1P05(M0084, R2 stuffed) CAM2_VDD_1P05,CAM3_VDD_1P05 (NOTE: current this is ~1.13VDC)
9CSI2_CLK_CON_P 
10GPIO_92_CAM1_RST_NRST_LOWER_N, gpio92
11CSI2_CLK_CON_N 
12GPIO_96_CAM_MCLK2MCLK_LOW, gpio96
13CSI2_LANE0_CON_P 
14GND 
15CSI2_LANE0_CON_N 
16GPIO_111_CCI_TIMER2CCI_TIMER_LOWER
17GND 
18GPIO_114_CCI_ASYNC_INCCI_TIMER_UPPER
19CSI2_LANE1_CON_P 
20GPIO97_CAM_MCLK3_CONMCLK_UPPER, gpio97
21CSI2_LANE1_CON_N 
22VREG_PM8009_L5_2P8AVDD_2P8, CAM2_DOVDD_2P8, CAM3_DOVDD_2P8
23CSI2_LANE2_CON_P 
24GND 
25CSI2_LANE2_CON_N 
26GPIO_109_CAM3_RST_N(shared, RST_UPPER_SHARED_N)
27GND 
28CCI_I2C3_SDACAM3_CCI3_SDA, CAM5_CCI3_SDA, gpio107
29CSI2_LANE3_CON_P 
30CCI_I2C3_SCLCAM3_CCI3_SCL, CAM5_CCI3_SCL, gpio108
Pin #Signal NameNotes
31CSI2_LANE3_CON_N 
32MCLK6_G1_CON(shared) GPIO_MCLK6_SHARED, gpio100
33GND 
34GPIO_4_CAM1_SPI1_MISO/dev/spidev1.0
35CSI3_CLK_CON_P 
36GPIO_5_CAM1_SPI1_MOSI/dev/spidev1.0
37CSI3_CLK_CON_N 
38GPIO_6_CAM1_SPI1_CLK/dev/spidev1.0
39CSI3_LANE0_CON_P 
40GPIO_7_CAM1_SPI1_CS/dev/spidev1.0
41CSI3_LANE0_CON_N 
42VREG_S4A_1P8 
43GND 
44GND 
45CSI3_LANE1_CON_P 
46VPH_PWR 
47CSI3_LANE1_CON_N 
48VPH_PWR 
49CSI3_LANE2_CON_P 
50GND 
51CSI3_LANE2_CON_N 
52VREG_3P3V_LOCAL 
53GND 
54GND 
55CSI3_LANE3_CON_P 
56VDC_5V_LOCAL 
57CSI3_LANE3_CON_N 
58VDC_5V_LOCAL 
59GND 
60GND 

J8 - Camera Group 2 Specific Pinout

Configured for the following hardware:

                                                 +--> M0010
- M0054 J8 <--> M0076-1 interposer <--> M0010 <--|
                                                 +--> M0010

More camera information here More regulator information here

Connector: DF40C-60DP-0.4V(51)

Device Tree:

  • qcom,cam-sensor4
  • qcom,cam-sensor5
J8 Pin-out
Pin #Signal NameUsage / Notes
1GND 
2GND 
3CCI_I2C1_SDACAM1_CCI1_SDA, CAM4_CCI1_SDA, gpio103
4VREG_PM8009_L2_1P2DVDD 1.2V
5CCI_I2C1_SCLCAM1_CCI1_SCL, CAM4_CCI1_SCL gpio104
6VREG_PM8009_L7_1P8CAM0_VIO_1P8, CAM0_VIO_1P8
7GND 
8VREG_PM8009_L1_1P05CAM0_VDD_1P05, NOTE: current this is ~1.13VDC
9CSI4_CLK_CON_P 
10GPIO_78_CAM4_RST_NCAM4_RST_N, gpio78
11CSI4_CLK_CON_N 
12GPIO_98_CAM_MCLK4CAM_MCLK4_CON, gpio98
13CSI4_LANE0_CON_PLEFT
14GND 
15CSI4_LANE0_CON_NLEFT
16GPIO_112_CCI_TIMER3(unused in version 0)
17GND 
18GPIO_111_CCI_TIMER2CAM_FSYNC_5_OUT, CAM_FSYNC4_IN
19CSI4_LANE1_CON_PRIGHT
20CAM_MCLK5_CONCAM_MCLK5_CON, gpio99
21CSI4_LANE1_CON_NRIGHT
22VREG_PM8009_L6_2P8CAM4_AVDD_2P8, CAM5_AVDD_2P8
23CSI4_LANE2_CON_P 
24GND 
25CSI4_LANE2_CON_N 
26GPIO_109_CAM3_RST_N(shared, CAM3_RST_N)
27GND 
28CCI_I2C3_SDACAM5_CCI3_SDA, CAM3_CCI3_SDA, gpio107
29CSI4_LANE3_CON_P 
30CCI_I2C3_SCLCAM5_CCI3_SCL, CAM3_CCI3_SCL, gpio108
Pin #Signal NameNotes
31CSI4_LANE3_CON_N 
32MCLK6_G2_CON(shared) CAM1_RST_N, gpio109
33GND 
34GPIO_12_CAM2Not used as RTS, not available as GPIO
35CSI5_CLK_CON_P 
36GPIO_13_CAM2Not used as CTS, not available as GPIO
37CSI5_CLK_CON_N 
38GPIO_14_CAM2_UART5_TX/dev/ttyHS0
39CSI5_LANE0_CON_P 
40GPIO_15_CAM2_UART5_RX/dev/ttyHS0
41CSI5_LANE0_CON_N 
42VREG_S4A_1P8 
43GND 
44GND 
45CSI5_LANE1_CON_P 
46VPH_PWR 
47CSI5_LANE1_CON_N 
48VPH_PWR 
49CSI5_LANE2_CON_P 
50GND 
51CSI5_LANE2_CON_N 
52VREG_3P3V_LOCAL 
53GND 
54GND 
55CSI5_LANE3_CON_P 
56VDC_5V_LOCAL 
57CSI5_LANE3_CON_N 
58VDC_5V_LOCAL 
59GND 
60GND 

J10 - External SPI

Overview

Available from apps proc as /dev/spidev14.0.

J10 Pin-out

Pin#SignalNotes/Usage
1VREG_3P3V_LOCAL3.3V Power Output *
2MISO (Input)APPS_QUP_14, 3.3V signal levels
3MOSI (Output)APPS_QUP_14, 3.3V signal levels
4SCLK (Output)APPS_QUP_14, 3.3V signal levels
5CS0_N (Output)APPS_QUP_14, 3.3V signal levels
6CS1_N/GPIO_46 (Output)Second SPI CS_N or GPIO
732K_CLK_OUT (Output)32kHz PMIC Sleep CLK, 3.3V signal levels
8GNDGND

J18 UART (ESC)

J18 ESC UART

Pin#SignalNotes/Usage
1VREG_3P3V_LOCAL3.3V Power Output *
2ESC_UART_TX (Output)SSC_QUP_2, 3.3V signal levels.
3ESC_UART_RX (Input)SSC_QUP_2, 3.3V signal levels.
4GNDGND

SW Summary

Available from DSP as QUP2. In the factory configuration, PX4 communicates to the VOXL ESC through this UART.


J19 - External Sensors (2x UART/ 2x I2C)

J19 Pin-out

Pin #Signal NameNotes
1VDC_5V_LOCALGNSS/Mag power *
2GNSS TX 3P3Vslpi_proc, SSC_QUP6
3GNSS RX 3P3Vslpi_proc, SSC_QUP6
4MAG SCL 3P3Vslpi_proc, SSC_QUP0
5MAG SDA 3P3Vslpi_proc, SSC_QUP0
6GND 
7I2C3 SCL 3P3Vslpi_proc, SSC_QUP3
8I2C3 SDA 3P3Vslpi_proc, SSC_QUP3
9VREG_3P3V_RCRC power *, controllable via GPIO 159
10RC_UART_TX (Output)slpi_proc, SSC_QUP7, 3.3V signal levels
11RC_UART_RX (Input)slpi_proc, SSC_QUP7, 3.3V signal levels
12GND 

SW Summary

All connected to the DSP, and in the factory configuration are used as follows:

  • QUP0 - I2C for external magnetomter
  • QUP3 - future use
  • QUP6 - UART for external GNSS (GPS)
  • QUP7 - UART for external RC input

Power Input/Output Important Note:

  • All power outputs on cable connectors are rated for 1A, however, the system cannot provide 1A simultaneously on all connectors. Contact ModalAI for design assistance.

  • The difference between VDCIN_5V and VDC_5V_LOCAL is very important. The power module provides VDCIN_5V (raw voltage input) to the platform. On-board is an eFuse that protects the system from accidental wrong-voltage application, droops/brown-outs, or down-stream shorts or overloads. The output of the eFuse is VDC_5V_LOCAL (i.e.: protected output).