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M0076 VOXL 2 AXT Interposer

Specification

SpecificationValue
LengthNot Applicable, Connector “interposer” format
VOXL2-side ConnectorJ2, 60-pin Hirose DF40C-60DS-0.4V
Mating ConnectorJ1, Voxl style 36-pin Panasonic AXT336124
PurposeConnects “Lower Group” signals (CSI, Timers, Resets, etc) of either J6, J7, or J8 60-pin DF40 to a Voxl format 36-pin AXT connector. Refer to Voxl2 datasheets for more description on a camera “group”

Pin Out VOXL2-side, J2

PinNetNotes/Usage
1GND 
2GND 
3Lower CCI_I2C_SDAAvailable on J1
4DVDD 1.2VNot default, R option
5Lower CCI_I2C_SCLAvailable on J1
6DOVDD 1.8VAvailable on J1
7GND 
8DVDD 1.05VAvailable on J1
9Lower CSI_CLK_PAvailable on J1
10Lower RST_NAvailable on J1
11Lower CSI_CLK_MAvailable on J1
12Lower MCLKAvailable on J1
13Lower CSI_DAT0_PAvailable on J1
14GND 
15Lower CSI_DAT0_MAvailable on J1
16Lower CCI TimerTest Point TP2 Only
17GND 
18Upper CCI TimerTest Point TP3 and Both Syncs on J1
19Lower CSI_DATA1_PAvailable on J1
20Upper MCLKAvailable on J1
21Lower CSI_DATA1_MAvailable on J1
22AVDD 2.8VAvailable on J1
23Lower CSI_DATA2_PAvailable on J1
24GND 
25Lower CSI_DATA2_MAvailable on J1
26Upper RST_N, SharedAvailable on J1 as CAM_RST_STBY_N
27GND 
28Upper CCI_I2C_SDAAvailable on J1
29Lower CSI_DATA3_PAvailable on J1
30Upper CCI_I2C_SCLAvailable on J1
31Lower CSI_DATA3_MAvailable on J1
32Spare MCLK/GPIOTest Point TP4 Only
33GND 
34Group SPI MISOTest Point TP5 Only
35Upper CSI_CLK_PNot Available/Routed
36Group SPI MOSITest Point TP6 Only
37Upper CSI_CLK_MNot Available/Routed
38Group SPI SCLKTest Point TP7 Only
39Upper CSI_DATA0_PNot Available/Routed
40Group SPI CS_NTest Point TP8 Only
41Upper CSI_DATA0_MNot Available/Routed
42VREG_S4A_1P8Test Point TP1 Only
43GND 
44GND 
45Upper CSI_DATA1_PNot Available/Routed
46VPH_PWR 3.8VAvailable on J1
47Upper CSI_DATA1_MNot Available/Routed
48VPH_PWR 3.8VAvailable on J1
49Upper CSI_DATA2_PNot Available/Routed
50GND 
51Upper CSI_DATA2_MNot Available/Routed
523.3VTest Point TP9 only
53GND 
54GND 
55Upper CSI_DATA3_PNot Available/Routed
565VTest Point TP10 only
57Upper CSI_DATA3_MNot Available/Routed
585VTest Point TP10 only
59GND 
60GND 

Pin Out Mating-side (Voxl format), J1

PinNetNotes/Usage
1DGND 
2DGND 
3AFVDDNormally Unused, 2.8V
4CAM_RST_STBY_NNormally Unused, power down signal
5CCI_I2C_SDA0CCI I2C Bus, SDA
61P8_VDDIO1.8V VDDIO (VREG_S4A or switched VREG_S4A)
7CCI_I2C_SCL0CCI I2C Bus, SCL
8VREG_DVDD1.1V or 1.2V DVDD
9CAM_RST0_NSensor Reset Control, 0
10CAM_MCLKx_BUFFMCLK, Buffered from Voxl2, 1.8V
11DGND 
12DGND 
13MIPI_CSI_CLK_CONN_PMIPI CSI High Speed Diff Pair, CLK_P
14CAM_FLASHSensor Sideband Control, Normally Unused
15MIPI_CSI_CLK_CONN_MMIPI CSI High Speed Diff Pair, CLK_M
16CAM_SYNC_0Sensor Sync Signal, Shorted to SYNC_1 if using M0010
17MIPI_CSI_LANE0_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 0_P
18CAM_MCLK1Second MCLK, Buffered from Voxl, 1.8V.
19MIPI_CSI_LANE0_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 0_M
20CAM_AVDD_2P8Sensor 2.8V AVDD
21DGND 
22DGND 
23MIPI_CSI_LANE1_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 1_P
24CAM_RST1_NSensor Reset Control, 1
25MIPI_CSI_LANE1_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 1_M
26CAM_SYNC_1Sensor Sync Signal, Shorted to SYNC_0 if using M0010
27MIPI_CSI_LANE2_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 2_P
28CCI_I2C_SDA1Second CCI I2C Bus, SDA
29MIPI_CSI_LANE2_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 2_M
30CCI_I2C_SCL1Second CCI I2C Bus, SCL
31DGND 
32DGND 
33MIPI_CSI_LANE3_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 3_P
34VPH_PWR_3P8V3.8V Primary “Phone” Power (mimics nominal 1S)
35MIPI_CSI_LANE3_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 3_M
36DGND 

Technical Drawings

3D STEP File

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2D Diagram

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