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M0109 VOXL 2 J-Flex Cable

Specification

SpecicifcationValue
Length 
Width 
VOXL2-side Connector, J1DF40C-60DS-0.4V
Stereo Module Connectors, J2 and J3 

Description TO DO

Pin Out VOXL2-side, J1

Camera GroupConnector Pin #Group FunctionVOXL2 Specific Net Name
0:J61GNDDGND
0:J62GNDDGND
0:J63Lower CCI_I2C_SDACCI_I2C0_SDA
0:J64DVDD 1.2VPM8009_VREG_L2_DVDD_1P2
0:J65Lower CCI_I2C_SCLCCI_I2C0_SCL
0:J66DOVDD 1.8VPM8009_VREG_L7_DOVDD_1P8
0:J67GNDDGND
0:J68DVDD 1.05VPM8009_VREG_L1_DVDD_1P05
0:J69Lower CSI_CLK_PCSI0_CLK_CON_P
0:J610Lower RST_NGPIO_93_CAM0_RST_N
0:J611Lower CSI_CLK_MCSI0_CLK_CON_M
0:J612Lower MCLKCAM_MCLK0_CON
0:J613Lower CSI_DAT0_PCSI0_LANE0_CON_P
0:J614GNDDGND
0:J615Lower CSI_DAT0_MCSI0_LANE0_CON_N
0:J616Lower CCI TimerGPIO_110_CCI_TIMER1
0:J617GNDDGND
0:J618Upper CCI TimerGPIO_113_CCI_TIMER4
0:J619Lower CSI_DATA1_PCSI0_LANE1_CON_P
0:J620Upper MCLKCAM_MCLK1_CON
0:J621Lower CSI_DATA1_MCSI0_LANE1_CON_N
0:J622AVDD 2.8VPM8009_VREG_L5_AVDD_2P8
0:J623Lower CSI_DATA2_PCSI0_LANE2_CON_P
0:J624GNDDGND
0:J625Lower CSI_DATA2_MCSI0_LANE2_CON_N
0:J626Upper RST_N, SharedGPIO_109_CAM3_RST_N
0:J627GNDDGND
0:J628Upper CCI_I2C_SDACCI_I2C1_SDA
0:J629Lower CSI_DATA3_PCSI0_LANE3_CON_P
0:J630Upper CCI_I2C_SCLCCI_I2C1_SCL
0:J631Lower CSI_DATA3_MCSI0_LANE3_CON_N
0:J632Spare MCLK/GPIOMCLK6_G0_CON
0:J633GNDDGND
0:J634Group SPI MISOGPIO_28_CAM0_SPI0_MISO
0:J635Upper CSI_CLK_PCSI1_CLK_CON_P
0:J636Group SPI MOSIGPIO_29_CAM0_SPI0_MOSI
0:J637Upper CSI_CLK_MCSI1_CLK_CON_N
0:J638Group SPI SCLKGPIO_30_CAM0_SPI0_CLK
0:J639Upper CSI_DATA0_PCSI1_LANE0_CON_P
0:J640Group SPI CS_NGPIO_31_CAM0_SPI0_CS
0:J641Upper CSI_DATA0_MCSI1_LANE0_CON_N
0:J642VREG_S4A_1P8VREG_S4A_1P8
0:J643GNDDGND
0:J644GNDDGND
0:J645Upper CSI_DATA1_PCSI1_LANE1_CON_P
0:J646VPH_PWR 3.8VVPH_PWR
0:J647Upper CSI_DATA1_MCSI1_LANE1_CON_N
0:J648VPH_PWR 3.8VVPH_PWR
0:J649Upper CSI_DATA2_PCSI1_LANE2_CON_P
0:J650GNDDGND
0:J651Upper CSI_DATA2_MCSI1_LANE2_CON_N
0:J6523.3VVREG_3P3V_LOCAL
0:J653GNDDGND
0:J654GNDDGND
0:J655Upper CSI_DATA3_PCSI1_LANE3_CON_P
0:J6565VVDC_5V_LOCAL
0:J657Upper CSI_DATA3_MCSI1_LANE3_CON_N
0:J6585VVDC_5V_LOCAL
0:J659GNDDGND
0:J660GNDDGND
1:J71GNDDGND
1:J72GNDDGND
1:J73Lower CCI_I2C_SDACCI_I2C2_SDA
1:J74DVDD 1.2VPM8009_VREG_L2_DVDD_1P2
1:J75Lower CCI_I2C_SCLCCI_I2C2_SCL
1:J76DOVDD 1.8VPM8009_VREG_L7_DOVDD_1P8
1:J77GNDDGND
1:J78DVDD 1.05VPM8009_VREG_L1_DVDD_1P05
1:J79Lower CSI_CLK_PCSI2_CLK_CON_P
1:J710Lower RST_NGPIO_92_CAM1_RST_N
1:J711Lower CSI_CLK_MCSI2_CLK_CON_M
1:J712Lower MCLKCAM_MCLK2_CON
1:J713Lower CSI_DAT0_PCSI2_LANE0_CON_P
1:J714GNDDGND
1:J715Lower CSI_DAT0_MCSI2_LANE0_CON_N
1:J716Lower CCI TimerGPIO_111_CCI_TIMER2
1:J717GNDDGND
1:J718Upper CCI TimerGPIO_114_CCI_ASYNC_IN
1:J719Lower CSI_DATA1_PCSI2_LANE1_CON_P
1:J720Upper MCLKCAM_MCLK3_CON
1:J721Lower CSI_DATA1_MCSI2_LANE1_CON_N
1:J722AVDD 2.8VPM8009_VREG_L6_AVDD_2P8
1:J723Lower CSI_DATA2_PCSI2_LANE2_CON_P
1:J724GNDDGND
1:J725Lower CSI_DATA2_MCSI2_LANE2_CON_N
1:J726Upper RST_N, SharedGPIO_109_CAM3_RST_N
1:J727GNDDGND
1:J728Upper CCI_I2C_SDACCI_I2C3_SDA
1:J729Lower CSI_DATA3_PCSI2_LANE3_CON_P
1:J730Upper CCI_I2C_SCLCCI_I2C3_SCL
1:J731Lower CSI_DATA3_MCSI2_LANE3_CON_N
1:J732Spare MCLK/GPIOMCLK6_G1_CON
1:J733GNDDGND
1:J734Group SPI MISOGPIO_4_CAM1_SPI1_MISO
1:J735Upper CSI_CLK_PCSI3_CLK_CON_P
1:J736Group SPI MOSIGPIO_5_CAM1_SPI1_MOSI
1:J737Upper CSI_CLK_MCSI3_CLK_CON_N
1:J738Group SPI SCLKGPIO_6_CAM1_SPI1_CLK
1:J739Upper CSI_DATA0_PCSI3_LANE0_CON_P
1:J740Group SPI CS_NGPIO_7_CAM1_SPI1_CS
1:J741Upper CSI_DATA0_MCSI3_LANE0_CON_N
1:J742VREG_S4A_1P8VREG_S4A_1P8
1:J743GNDDGND
1:J744GNDDGND
1:J745Upper CSI_DATA1_PCSI3_LANE1_CON_P
1:J746VPH_PWR 3.8VVPH_PWR
1:J747Upper CSI_DATA1_MCSI3_LANE1_CON_N
1:J748VPH_PWR 3.8VVPH_PWR
1:J749Upper CSI_DATA2_PCSI3_LANE2_CON_P
1:J750GNDDGND
1:J751Upper CSI_DATA2_MCSI3_LANE2_CON_N
1:J7523.3VVREG_3P3V_LOCAL
1:J753GNDDGND
1:J754GNDDGND
1:J755Upper CSI_DATA3_PCSI3_LANE3_CON_P
1:J7565VVDC_5V_LOCAL
1:J757Upper CSI_DATA3_MCSI3_LANE3_CON_N
1:J7585VVDC_5V_LOCAL
1:J759GNDDGND
1:J760GNDDGND
2:J81GNDDGND
2:J82GNDDGND
2:J83Lower CCI_I2C_SDACCI_I2C1_SDA
2:J84DVDD 1.2VPM8009_VREG_L2_DVDD_1P2
2:J85Lower CCI_I2C_SCLCCI_I2C1_SCL
2:J86DOVDD 1.8VPM8009_VREG_L7_DOVDD_1P8
2:J87GNDDGND
2:J88DVDD 1.05VPM8009_VREG_L1_DVDD_1P05
2:J89Lower CSI_CLK_PCSI4_CLK_CON_P
2:J810Lower RST_NGPIO_78_CAM2_RST_N
2:J811Lower CSI_CLK_MCSI4_CLK_CON_M
2:J812Lower MCLKCAM_MCLK4_CON
2:J813Lower CSI_DAT0_PCSI4_LANE0_CON_P
2:J814GNDDGND
2:J815Lower CSI_DAT0_MCSI4_LANE0_CON_N
2:J816Lower CCI TimerGPIO_112_CCI_TIMER3
2:J817GNDDGND
2:J818Upper CCI TimerGPIO_111_CCI_TIMER2
2:J819Lower CSI_DATA1_PCSI4_LANE1_CON_P
2:J820Upper MCLKCAM_MCLK5_CON
2:J821Lower CSI_DATA1_MCSI4_LANE1_CON_N
2:J822AVDD 2.8VPM8009_VREG_L6_AVDD_2P8
2:J823Lower CSI_DATA2_PCSI4_LANE2_CON_P
2:J824GNDDGND
2:J825Lower CSI_DATA2_MCSI4_LANE2_CON_N
2:J826Upper RST_N, SharedGPIO_109_CAM3_RST_N
2:J827GNDDGND
2:J828Upper CCI_I2C_SDACCI_I2C3_SDA
2:J829Lower CSI_DATA3_PCSI4_LANE3_CON_P
2:J830Upper CCI_I2C_SCLCCI_I2C3_SCL
2:J831Lower CSI_DATA3_MCSI4_LANE3_CON_N
2:J832Spare MCLK/GPIOMCLK6_G2_CON
2:J833GNDDGND
2:J834Group SPI MISOGPIO_12_CAM1_SPI5_MISO
2:J835Upper CSI_CLK_PCSI5_CLK_CON_P
2:J836Group SPI MOSIGPIO_13_CAM1_SPI5_MOSI
2:J837Upper CSI_CLK_MCSI5_CLK_CON_N
2:J838Group SPI SCLKGPIO_14_CAM1_SPI5_CLK
2:J839Upper CSI_DATA0_PCSI5_LANE0_CON_P
2:J840Group SPI CS_NGPIO_15_CAM1_SPI5_CS
2:J841Upper CSI_DATA0_MCSI5_LANE0_CON_N
2:J842VREG_S4A_1P8VREG_S4A_1P8
2:J843GNDDGND
2:J844GNDDGND
2:J845Upper CSI_DATA1_PCSI5_LANE1_CON_P
2:J846VPH_PWR 3.8VVPH_PWR
2:J847Upper CSI_DATA1_MCSI5_LANE1_CON_N
2:J848VPH_PWR 3.8VVPH_PWR
2:J849Upper CSI_DATA2_PCSI5_LANE2_CON_P
2:J850GNDDGND
2:J851Upper CSI_DATA2_MCSI5_LANE2_CON_N
2:J8523.3VVREG_3P3V_LOCAL
2:J853GNDDGND
2:J854GNDDGND
2:J855Upper CSI_DATA3_PCSI5_LANE3_CON_P
2:J8565VVDC_5V_LOCAL
2:J857Upper CSI_DATA3_MCSI5_LANE3_CON_N
2:J8585VVDC_5V_LOCAL
2:J859GNDDGND
2:J860GNDDGND

Pin Out Mating-side, J2 (TBD CSI Port)

PinNetUpper CCI Notes/Usage
1DGND 
2DGND 
3AFVDDNormally Unused, 2.8V
4CAM_RST_STBY_NNormally Unused, power down signal
5CCI_I2C_SDA0CCI I2C Bus, SDA
61P8_VDDIO1.8V VDDIO (LDO)
7CCI_I2C_SCL0CCI I2C Bus, SCL
8VREG_DVDD1.05V (default) or 1.2V DVDD LDO
9CAM_RST0_NSensor Reset Control, 0
10CAM_MCLKx_BUFFMCLK, Buffered from Voxl2, 1.8V
11DGND 
12DGND 
13MIPI_CSI_CLK_CONN_PMIPI CSI High Speed Diff Pair, CLK_P
14CAM_FLASHSensor Sideband Control, Normally Unused
15MIPI_CSI_CLK_CONN_MMIPI CSI High Speed Diff Pair, CLK_M
16CAM_SYNC_0Sensor Sync Signal, Shorted to SYNC_1
17MIPI_CSI_LANE0_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 0_P
18CAM_MCLK1Second MCLK, Buffered from Voxl, 1.8V.
19MIPI_CSI_LANE0_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 0_M
20CAM_AVDD_2P8Sensor 2.8V AVDD LDO
21DGND 
22DGND 
23MIPI_CSI_LANE1_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 1_P
24CAM_RST1_NSensor Reset Control, 1
25MIPI_CSI_LANE1_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 1_M
26CAM_SYNC_1Sensor Sync Signal, Shorted to SYNC_0
27MIPI_CSI_LANE2_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 2_P
28CCI_I2C_SDA1Second CCI I2C Bus, SDA
29MIPI_CSI_LANE2_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 2_M
30CCI_I2C_SCL1Second CCI I2C Bus, SCL
31DGND 
32DGND 
33MIPI_CSI_LANE3_CONN_PMIPI CSI High Speed Diff Pair, Data Lane 3_P
34VPH_PWR_3P8V3.8V Primary “Phone” Power (mimics nominal 1S)
35MIPI_CSI_LANE3_CONN_MMIPI CSI High Speed Diff Pair, Data Lane 3_M
36DGND 

Pin Out Mating-side, J3 (TBD CSI Port)

PinNetTBD CCI Notes/Usage
1  

Technical Drawings

3D STEP File

2D Diagrams